The present invention is in the field of echo cancellers and in particular is an improved echo canceller using a logarithmic format to simplify the hardware of the canceller.
It is well known that hybrid circuits connecting two-wire to four-wire circuits in long distance communications networks do not provide echo free coupling between the send and receive lines of the four-wire circuit. A portion of the signal on the received line will pass to the send line and appear as a echo signal. When the four-wire system is used for very long distance communication, the echo signal can be particularly disturbing.
For round trip delays (t.sub.RD) encountered, e.g., in east-to-west coast connections (t.sub.RD .apprxeq. 70 ms) or satellite communications (t.sub.RD .apprxeq. 500 ms), an additional echo suppressing and/or cancelling device becomes a necessity for commercial use. Therefore, in the last 45 years considerable research and development effort has been spent on designing the so-called echo suppressors. The echo suppressors are relatively simple electromechanical or electronic voice activated switches which disconnect the echo path according to the direction of the signal in the 4-wire section.
In spite of great improvements in echo suppression technique and technology, these devices can fail to provide adequate quality for 2-way communication mainly under the following adverse conditions:
a. when both parties are trying to talk simultaneously, i.e., during the so-called double talk period;
b. when there is a substantial difference in the sent-out signal level between the two communicating telephone sets assuming nominal loss in the circuit otherwise;
c. when the echo return loss is less than 9dB. All of these conditions increase their adverse effects with increasing round trip delay, not only because of the long propagation time between communicating parties but also because the long round trip delay connection usually interconnects two telephone networks built and maintained by different standards where the average echo return loss .mu..sub.HL and standard deviation of this loss .sigma..sub.HL have different, usually less favorable, values than U.S. networks.
In order to overcome these problems, an "echo canceller" was originally suggested by J. L. Kelly, Jr., and the implementation of this idea is described in an article by M. J. Sondhi, "An Adaptive Echo Canceller", Bell System Technical Journal, Volume 46, No. 3, March 1967, pp. 497 to 511. This particular design uses an analog technique, in other words, an analog delay line develops a replica of the echo signal which is then subtracted from the received signal. However, analog delay lines are difficult to implement where roudtrip delays of several tens of milliseconds are involved.
The problem associated with the analog techniques were overcome by the so-called digital "echo canceller" using digital techniques inside the operational loop. This design was described in an article by S. J. Campanella et al, "Analysis of an Adaptive Impulse Response Echo Canceller", COSMAT Technical Review, Volume 2, No. 1, Spring 1972, pp. 1 to 38. While the basic approach of the digital echo canceller is sound, it is a highly complex and very expensive system. The principle reason for the complexity and high cost of the digital echo canceller is the broad dynamic range of the speech and the long roundtrip delay 2t.sub.E between the hybrid and the echo cancelling device. For acceptable results with different levels of signals, the speech must be sampled, quantized and processed with 11 to 12 bits of precision. The delay of echo 2t.sub.E in some telephone networks can be as long as 50 milliseconds. With 8KHz sampling rates, the digital echo canceller must therefore be able to store 1 K to 2K bytes and process these bytes in parallel with a clock rate greater than 3MHz. As a result, the digital echo canceller is nearly two orders of magnitude more complicated (and expensive) than the most sophisticated echo suppressor.